Hi everyone,
I am building a demonstrator and I am using the AXL F PWM2 1H module to generate a PWM signal with a few kHz to control a coil.
The frequency value for the PWM channels is set to a constant value (10000 with / 10division = 1kHz here). The duty cycle value is calculated from a PID controller with a cyclic task that operates each millisecond (i.e. also 1kHz).
I connected an oscilloscope to the two PWM channels to see the output signal. Unfortunately it looks like whenever the PLC calculates new PWM values, it just sets the new comparator value for the PWM duty cycle inside of the AXL F PWM2 1H module. This causes artefacts and spikes (and jittering frequency) whenever the PLC writes the new duty cycle value, because there is no synchronization/buffering between the PWM clock domain and the PLC clock domain. Usually a buffer is used, where the new value is stored. This buffer is latched through to the internal comparator only at the point in time where a new PWM cycle starts.
Is there any way to get this behaviour on the PLC? I.e. a constant frequency and just a changing duty cycle without any frequency jitter and spikes?
I should mention that we are using an AXL F PWM2 1H with Revision 00/1.00 (i.e. < 01/1.10)
Best Regards
Simon
EDIT: Added Video
Imgur: a/pkvYAey